Section: New Results

Predictive Run-Time Verification of Timed Properties

Participants : Srinivas Pinisetty [Aalto University] , Thierry Jéron [Inria Rennes] , Stravos Tripakis [Aalto University] , Yliès Falcone, Hervé Marchand [Inria Rennes] , Viorel Preoteasa [Aalto University] .

Run-Time verification (RV) techniques are used to continuously check whether the (un-trustworthy) output of a black-box system satisfies or violates a desired property. When we consider run-time verification of timed properties, physical time elapsing between actions influences the satisfiability of the property. This work introduces predictive run-time verification of timed properties where the system is not entirely a black-box but something about its behavior is known a priori. A priori knowledge about the behavior of the system allows the verification monitor to foresee the satisfaction (or violation) of the monitored property. In addition to providing a conclusive verdict earlier, the verification monitor also provides additional information such as the minimum (maximum) time when the property can be violated (satisfied) in the future. The feasibility of the proposed approach is demonstrated by a prototype implementation, which is able to synthesize predictive run-time verification monitors from timed automata.

This work has been published in the Journal of Systems and Software 2017 [6].